Storage is no Longer the Bottleneck
Historically, the discrepancy between Compute performance and Storage capability has created a significant gap that limits real-world productivity. Intensifying data demands have made this issue increasingly apparent, and the need for effective solutions has become a critical business issue for a broad range of customers and applications. The introduction of flash-based storage provided a path towards mitigating this disconnect. The mainstream adoption of SATA and SAS solid state drives (SSDs) provided orders-of-magnitude improvement over the incumbent disk-based solutions. PCIe-based SSDs represented the next evolutionary step, shortening the I/O request path and moving flash closer to the CPU. Even with these advancements, however, the Compute-Storage gap still remained.
The Memory Channel Storage solution
Memory Channel Storage (MCS) technology represents the solution. MCS bypasses traditional storage interfaces and directly presents non-volatile memory (e.g. flash) on the memory subsystem. Massive data capacity is now accessible via the shortest and fastest possible path to the CPU….the memory channel. MCS-based products are physically deployed into the same DIMM slots that house DRAM and the first generation of MCS is fully-compatible with the DDR3 protocol. As a result, MCS provides a high-performance persistence layer that is tightly coupled with system memory. Data now remains local to the CPU and applications, which results in faster, more deterministic response time (a.k.a. latency).
Also, unlike pre-existing storage solutions, MCS does not force a trade-off between I/O throughput and latency. Since MCS leverages the inherent parallelism of the memory subsystem, ultra-low response times can be achieved while simultaneously servicing heavy I/O loads. Previously, deploying expensive DRAM was the only way to achieve this highly desirable combination of performance characteristics.
In addition, despite its disruptive performance characteristics, MCS fits seamlessly into existing IT infrastructures. All major operating systems are supported and no changes to applications are required.
With MCS, storage is no longer the bottleneck. The Compute-Storage gap has been eliminated and enterprise performance can be unlocked in ways that were previously impossible. Applications can immediately access larger data sets, perform faster analysis, and service more users than ever before. The next-generation of storage has arrived.
Carbon₂: Memory Channel Storage™ 2nd Generation
Introducing Carbon₂, the second generation of Diablo’s award-winning Memory Channel Storage architecture. Carbon₂ updates the first generation of MCS™ with a DDR-4 memory interface, allowing integration into the newest server architectures available. The first generation of MCS delivers write latency as low as 3.3 microseconds. Carbon₂ will reduce this latency even further Carbon₂ also includes a more powerful MCS Processing Engine, which provides increased performance and enhanced features.
Carbon₂ will be available in the first half of 2015 as a Reference Design Kit for Server and Solid State Storage OEM’s, allowing for early product development and pre-qualifications. As with the first generation of MCS, Diablo will provide fully certified drivers and support for Linux, VMware ESXi, and Microsoft Windows Server platforms.
Leverages the parallelism of the memory channel as a storage and memory alternative to DRAM and SSD’s.
Disruptive lowest latency at the highest, most scalable performance
Up to tens of terabytes of flash per server in standard DIMM form factor and DDR3 CPU interface
Deployable in all dense server, blade and storage array architectures
Future proofed with the ability to utilize NAND-flash and future non-volatile memories
Available Product Forms
Diablo’s MCS architecture can be found in the form of two currently available products: the IBM® eXFlash™ DIMM and the SanDisk® ULLtraDIMM™ SSD. Both MCS-based products are available in 200GB and 400GB capacities with power fail protection.
Memory Channel Storage provides a persistence layer directly connected to the processor memory controllers alongside DRAM (system memory), allowing both volatile and non-volatile memory on the same highest bandwidth, lowest-latency bus.